1. Field of the Invention
The invention relates to a semiconductor memory such as DRAM, ROM and a flash memory, and more particularly to such a semiconductor memory with a built-in row buffer.
2. Description of the Related Art
As illustrated in FIG. 1, a conventional semiconductor memory with a built-in row buffer is usually comprised of a sub-array 11 having a capacity of 256 Kbit, and a line row buffer 12 which is capable of storing data of sixteen rows of cells of the sub-array 11. The row buffer 12 is arranged for each one of the sub-arrays 11, and is connected to a common I/O bus (not illustrated). The row buffer 12 retains both external data to be transmitted to the sub-array 11 from an external peripheral circuit through the common I/O bus, and data read out of the sub-array 11 and transmitted to an external peripheral circuit.
As mentioned above, the row buffers arranged for each one of the sub-arrays are connected to the common I/O bus in a conventional semiconductor memory. In order to accomplish such a connection, it is necessary to form an internal I/O bus constituted of a lot of bus lines between each of the row buffers and the common I/O bus, with such structure requires a large semiconductor chip due to the internal I/O bus.
If one attempts to eliminate the internal I/O bus in order to avoid the semiconductor chip from becoming larger in size, it would be necessary to form three-layered aluminum wirings on the semiconductor substrate, which will be accompanied with a problem that a cost for fabricating a semiconductor device.